Principal advisor

   Dr. Ken Choi

    (CV in PDF for last 10 years)

   Kyu Won (Ken) Choi received the PhD. degree in electrical and computer engineering from  Georgia Institute of Technology, Atlanta, USA     in 2003. During the PhD. He proposed and conducted several projects supported by NASA (National Aeronautics and Space     Administration), DARPA (Defense Advanced Research Projects Agency), NSF (US National Science Foundation), and SRC (Scientific     Research Corporation) regarding power-aware  computing/communication (PACC). Since 2004, he had been with the  Takayasu Sakurai     Lab. in the University of Tokyo, Japan as a post-doc  research associate, working on leakage-power-reduction circuit techniques.

   Dr.Ken Choi was a senior computer aided design (CAD) engineer and a technical consultant for low-power system-on-chip (SoC) design in    Samsung Semiconductor and Sequence Design prior to joining IIT. In the past, he had six-year working experience in the area of VLSI chip    design and wireless telecommunication, and authored eleven papers and a book chapter for low-power design from compiler level to circuit    level. Last few years, by using his novel approaches, several chips were successfully fabricated in deep-submicrometer technology. His    research interests include DFP (Design For Power) and DFM (Design for Manufacturing). Dr. Choi is the founder and chief advisor of his    currently setup laboratory VLSI Design and Automation at the Ilinois Institute of Technology in the Fall of 2007.

Ph.D STUDENTS

   Haiqing Nan

•  Bechalor, (2006) in Electrical Engineering from Hebei University of Technology, China
•  Master, (2008) in Electrical Engineering from Illinois Institute of Technilogy, IL, U.S.

   Research

•  Low Power and High Performance Digtal Circuit Design
•  Variation Awared and Reliability Awared circuit design for Deep Sub-micro Technology
•  Circuit Design and Layout technique Based-on Carbon-Nanotube FET

    Yuchi Tsao

   Background

•  MS in Electrical Engineering with majors in Communication, Polytechnic University, NY

   Research

•  Mixed Signal and RF Circuit design for low power design

    Wei Wang

   Background

•  Master's degree in Mechan-electronic Engineering, Beijing Institute of Technology

   Research

•  VLSI Low-Power design at the RTL level

    Li Li

   Background

• Master in Pattern Recognition and System Intelligence, Huazhong University of Science and Technology

   Research

•  Design for Low Power at RT Level

    Naval Gupte

   Background

• Bachelor's in Instrumentation Engineering from J. N. Engineering College, India, June 2003
• Master in Micro-processor System and Applications from The M. S. University of Baroda, India, June 2006

   Research

•  Energy harvesting and Low Power VLSI Design

MASTER STUDENTS

    Feng Ge

    Background

• B.S in Material Science, Fudan University, China

    Research

•  Low-power VLSI chip design