LVS (layout vs. Schematic) using Gemini

Gemini is a program for comparing circuit netlists. Normally it is used to verify circuit layout by comparing a netlist extracted from a circuit layout to a specification netlist that is assumed to be correct. This kind of verification is commonly known as LVS (layout versus schematic). You will use Gemini to compare the netlist generated from Wirec(based on the schematic) with the one generated by ext2sim (based on the layout).

1. Running Gemini

Gemini takes two files in .sim format as its input. The two file names are specified on the UNIX command line:

%gemini file1.sim file2.sim

Gemini ignores all lines in the .sim file that begin with A, B, R, v and semicolon. There are also a variety of options that can be specified on the command line. For a full list of options see Gemini manual page.

Gemini produces certain information about the circuits (e.g., number of devices, number of nets) and tries to match all the nodes. The comparison is successful if you get the message:

All nodes were matched in number passes.

If the comparison fails, you will get the following message:

The circuits are different.

If you get this message you should go back and check your layout for functional differences from the schematic.